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1. Active parts (Devices)
Refers to various active integrated circuits or transistors in the semiconductor industry, as well as passive parts such as resistors and capacitors.
2. Array arrangement, array
It refers to the array of through holes or surface bonded solder pads that land on the surface of the board in a grid intersection pattern (i.e. matrix pattern). The commonly used plug-in parts with "pin grid array" are called PGA (Pin Grid Array), while the other type of mounting parts with "ball grid array" are called BGA (Ball Grid Array).
3. ASIC specific integrated circuit
Application-Specific Integrated Circuit， ICs customized for various specialized types such as televisions, speakers, recorders, cameras, etc.
4. Axial led axis pin
Traditional cylindrical resistors or capacitors have pins that lead out from the center of both ends and are used to be inserted into the through holes of the board to complete their overall function.
5. Ball Grid Array (encapsulated)
It is a pin packaging method for large components, similar to the four sided pins of QFP, which are connected to the circuit board using SMT solder paste. The difference lies in the "one degree space" single row pins listed around it, such as gull wing shaped extension legs, flat extension legs, or J-shaped legs that retract to the belly bottom; Change to a full or partial array at the bottom of the abdomen, and adopt a two-dimensional spatial distribution of solder ball feet as a soldering interconnect tool for chip packaging to circuit boards. BGA is a packaging method developed by Motorola in 1986. Initially, it was made of BT organic board to form a double-sided substrate, replacing traditional metal lead frames for IC packaging. The biggest advantage of BGA is that the lead pitch is much looser than QFP. Currently, the lead pitch of many QFPs has been tightened to a pitch of 12.5mil or even 9.8mil (such as the 320 pin CPU solder pad on the Daughter Card used in P5 laptops, which is currently constructed using the Super Solder method on its bare copper pad surface), making PCB manufacturing and downstream assembly very difficult. But if the CPU with the same function is changed to the BGA method with a full belly bottom array of pins, the pin spacing can be relaxed to 50 or 60mil, greatly easing the technical difficulties upstream and downstream. At present, BGA can be divided into five categories, namely: (1) plastic carrier board (BT) P-BGA (with double-sided and multi-layer), which has started mass production in China. (2) C-BGA on ceramic substrate (3), T-BGA packaged in TAB (4), ultra small m-BGA slightly larger than the original chip (5), and other special BGAs such as D-Bga (Dimpled) from Kyocera, M-BGA from Olin, and V-BGA from Prolinx. The latter is particularly noteworthy because its products are first produced domestically and are very difficult to produce. The method is to use silver paste as the conductive material for interlayer interconnection and use the Build Up method to produce V-BGA (Viper). This carrier board has two layers of copper sheets with a thickness of more than 10 mil as the heat dissipation layer, making it suitable for packaging high-power (5-6W) large ICs.
6. 7. Beam Lead parallel dense pins
It refers to the "tape automated bonding" (TAB) type carrier pins, which can directly solder bare chips onto the inner pins of TAB and then use their outer pins to solder onto the circuit board. This beam like parallel dense arrangement of pins used as chip carriers is called Beam Lead.
8. Bonding Wire
For the metal thin wires that complete electrical bonding between the chips and pins embedded in the IC, commonly used ones include gold wires and aluminum wires with a diameter between 1-2 mil.
9. Bump protrusion
Refers to various protruding small pieces, such as the various Solder Bump methods in DuPont's SSD process (Selective Solder Deposit), which is a use of "bumps" (see PCB Information Magazine, Issue 48, P.72). In addition, during the assembly process of TAB, there are many small solder or gold "bumps" (with an area of about 1 μ 2) around the periphery of the chip on the road surface, which can be used to flip and cover the corresponding inner pins of TAB to complete the interconnection between the "chip" and the "PCB" solder pads. The role of this "bump" is of utmost importance, and this process has not yet been promoted in China.
10. Bumping Process
It refers to the process of making small solder bumps (or gold bumps) on the surface of a completed wafer to facilitate downstream packaging and assembly processes such as TAB and Flip Chip. The production technology for small protrusions with a size of about 1mm is very difficult and has not yet been put into production in China.
11. C4 Chip Joint, C4 Chip Welding
Using tin lead eutectic alloy (63/37) to create high-temperature collapsible convex balls, which are fixed on the back of the chip or the front of the circuit, for "direct installation" (DCA) of downstream circuit boards, known as chip soldering. C4 is a process developed by IBM more than 20 years ago, originally referring to "Controlled Collapsed Chip Connection" for chips. It is now widely used in the assembly and soldering of P-BGA chips on motherboards, and is another field of collapse soldering method outside of chip connections.
12. Capacity capacitor
When there is a potential difference between two conductors, stored energy will accumulate in their medium, and sometimes a "capacitor" will appear. Its mathematical expression is C=Q/V, which means capacitance (Farad)=electric quantity (Coulomb)/voltage (volt). If two conductors are parallel plates (area A), separated by d, and the dielectric constant of the substance is ε, then C=ε A/d. Therefore, it is known that when A and d remain constant, the lower the dielectric constant, the smaller the capacitance that occurs between them.
13. Castallation Integrated Circuit Device
It is a ceramic package for large-scale chipsets (VLSI) without pins, which can be soldered using the metal pads in each stack and the corresponding solder pads on the board surface. This type of castle type IC is rarely used in general commercial electronic products and is only useful in large computers or military products.
14. Chip Interconnection
The interconnection operation of chips in the heart of a semiconductor integrated circuit (IC) before being packaged into complete components. The traditional chip interconnection method involves wire bonding between each electrode and pin; Later, there is the "Tape Automatic Bonding" (TAB) method; And the most advanced and difficult "flip chip" method. The latter is a nearly bare crystal size packaging method (CSP) with very high precision.
15. Chip on Board Chip Adhesive Board
It is to directly bond the chip of the integrated circuit to the circuit board with silver containing epoxy resin adhesive, and after "wire bonding" of the pins, add appropriate anti sagging epoxy resin or silicone resin to seal the COB area, which can save the packaging cost of the integrated circuit. Some consumer grade electronic probes or watches, as well as various timers, can be manufactured using this method. The micro scale ultrafine lines in this case are made from wafers produced by aluminum film vacuum deposition, precision photoresist, and precision plasma etching methods. After cutting the wafer to obtain individual chips, the grains are then die bonded at the center of the frame, followed by wire bonding, packaging, and bending to form common ICs. The large integrated circuit (VLSI) with four sided pins is also known as the "Chip Carrier" chip carrier, and the new TAB is also a type of "chip carrier" that does not require pre packaging. Since the prevalence of SMT, resistors and capacitors that should have been plugged in have been changed from horizontal axis pin packaging to small chip bodies for the sake of saving board assembly space and facilitating automation. Therefore, they are also known as chip resistors or chip capacitors. Furthermore, chips refer to the collapse of the first cutting edge of the drill tip on the drill needle, which is called chips.
16. Chip On Glass (COG) (direct installation of chips onto glass circuit boards)
In the glass circuit of a liquid crystal display (LCD), its ITO (Indium Tin Oxide) electrodes must be interconnected with various driver ICs on the circuit board in order to perform the imaging function. At present, QFP packaging is still widely used for various large ICs, so QFP must be installed on the PCB first, and then connected to the glass circuit board with conductive adhesive (such as Ag/Pd paste, Ag paste, unidirectional conductive adhesive, etc.). The new method is to directly mount the chip of the driver LSI on the ITO electrode point of the glass plate using a "flip chip" method, called COG method, which is a very advanced assembly technology. Similar statements include COF (Chip on Film) and others. Conform Coating is a protective layer applied to the board that completes the assembly of parts. In order to carefully protect the overall appearance of the board, it is coated with insulating paint for better reliability. This type of external protective layer is only used for general military or higher-level assembly boards.
17. Chip grain, chip, sheet
At the heart of various integrated circuit (IC) packages, there are densely packed dies or chips, which are small "circuit chips" cut from a collection of multiple wafers.
18. Daisy Chained Design Chrysanthemum valve ring design
Refers to a square circular design composed of tightly arranged "rectangular pads" on all sides, resembling a flower wreath formed by the sequential arrangement of chrysanthemum petals. Common examples include electrode pads on the periphery of chips or solder pads for various QFPs on the board.
19. Device electronic components
It refers to a basic electronic component that can perform independent functions on an independent entity and cannot be further distinguished from its purpose without destruction.
20. Dicing chip segmentation
Dicing refers to the process of cutting semiconductor wafers into complete chip or die units with a diamond knife, one by one.
21. Die Attach grain installation
After completing testing and cutting, the good grains are installed on externally interconnected lead frame systems (such as traditional Lead Frame or new BGA carrier boards) using various methods, known as "Anjing". Then, the IC is packaged by connecting the output points of the grains with the lead wires of the tripod, or by directly using the flip chip bonding method with bumps. The above-mentioned "grain installation" was initially achieved by combining the gold plating layer on the back of the chip with the gold plating layer on the tripod, using high-temperature bonding (T. C. Bond) or ultrasonic bonding (U.C. Bond) to complete the bonding, hence it is called Die Bond. But currently, in order to save gold plating and adapt to the new process of "direct grain installation" (DCA or COB) on the board surface, silver containing thermal conductive adhesive has been used instead of gold plating layer fusion, so it has been renamed as "Die Attach".
22. Die Bonding grain bonding
Die also refers to the heart part of an integrated circuit, which is a small piece of "grain" with lines cut from a wafer. The gold layer on its back is mechanically bonded to the gold-plated surface in the center of the lead frame using high-temperature mechanical compression bonding (T.C. Bonding), or fixed by epoxy resin bonding, to complete the first step of IC internal circuit packaging.
23. Diode diode
As a type of semiconductor component "transistor", it has two terminals connected to a substrate. When the polarity of the applied voltage is different, it will also exhibit different conductor properties. Another type of "light-emitting diode" can replace various colored light points on the dashboard, which is more energy-efficient and durable than ordinary light bulbs. At present, most diodes have been converted to SMT form, and the anatomical diagram of SOT-23 is shown in the figure.
24. DIP (Dual Inline Package) dual pin package
A component with double row symmetrical pins that can be soldered into the double row symmetrical pin holes on a circuit board. This type of component is mostly used in early various ICs, and some "mesh resistors" are also used.
25. Discrete Component Bulk Parts
Refers to small passive resistors or capacitors, which are different from integrated circuits with centralized active component functions.
26. Encapsulating capsules, capsules
To prevent waterproofing or air pollution, certain items are sealed and isolated from the outside world.
27. End Cap Head
End Cap refers to some small chip resistors or capacitors of SMD, whose two ends can be used as conductive and soldered metal parts, called End Cap.
28. Flat Pack (parts of the package)
Thin shaped components, such as small and special ICs, have parallel pins on both sides that can be flat soldered onto the board surface, greatly reducing the volume or thickness of the assembled product. They are commonly used in military products and are the pioneer of SMT.
29. Flip Chip overlay, clip on
The reverse bonding of chips on the board surface, early known as Facedown Bonding, uses protruding metal contacts (such as Gold Bumps or Solder Bumps) as connection tools. This protruding contact can be placed on the chip or the receiving board surface, and then interconnected using C4 soldering method. It is a technology for directly packaging and assembling chips on board (DCA or COB).
30. Four Point Twisting
This method is an external force testing method aimed at understanding the strength of each solder joint of some large QFPs bonded to the board surface. Set support points at the two diagonal corners of the board, and apply pressure at the other two diagonal corners to force the board to twist and deform. Observe the strength of each solder joint based on the relationship between its deformation and the magnitude of the pressure.
31. Gallium Arsenide (GaAs) Gallium Arsenide
It is a common substrate material for semiconductor circuits, with the chemical symbol GaAs, which can be used to manufacture high-speed IC components at a faster speed than those using silicon as the chip substrate.
32. Gate Array Gate Array, Gate Column
It is the basic element of semiconductor products, referring to the electrode that controls the signal input, commonly known as the "gate".
33. Glob Top Dome Package
Refers to a circular arc-shaped encapsulated body or its construction method where the chip is directly mounted on the Chip On Board. The sealing agents used include epoxy resin, silicone resin (also known as polydimethylsiloxane), or their mixed adhesives.
34. Gull Wing Tead pin
This type of small outward protruding double row foot is specifically designed for surface adhesive SOIC packaging and was first developed by Philips in the Netherlands in 1971. The combination of this body and pins has a shape that resembles a seagull spreading its wings, hence the name 'gull wing feet'. Its external dimensions have been standardized under JEDEC's MS-012 and -013 specifications.
35. Integrated Circuit (IC) Integrated Circuit Device
On the same thin substrate (silicon material) at multiple levels, many tiny electronic components (such as resistors, capacitors, semiconductors, diodes, transistors, etc.) are arranged, as well as various tiny interconnection conductor lines, forming a comprehensive active component, abbreviated as ICC.
36. J-Lead J-type pin
It is the standard pin connection method for PLCC (Plastic Leaded Chip Carrier) "plastic chip carrier" (i.e. VLSI). Due to the advantages of saving board area and easy cleaning after soldering, this double-sided or four sided pin connection has the best way to maintain "coplanarity" in packaging and assembly of high pin count SMD, as it is easier to maintain "coplanarity" compared to another Gull Wing Lead method.
37. Lead pin, pin
When electronic components are to be rooted and assembled on a circuit board, they must have various pins to complete the soldering and interconnection work. Early pins were mostly socket soldered, but in recent years, due to the increase in assembly density, they have gradually been changed to surface mount (SMD) solder pins. And there are also "pinless" components that use specific solder joints on the packaging body for surface bonding, which are called Leadless components.
38. Known Good Die (KGD) chips
The chip of an IC can be called a Chip or Die. There are many chips on the completed wafer, with varying degrees of quality. After further life testing (Burn in Test, also known as aging test), the known chip with good electrical properties is called KGD. However, the definition of KGD is quite divergent, and even when the same company has different products or different customers for the same product, its definition is difficult to be consistent. A representative statement is: "A certain chip has good electrical quality after aging and electrical testing, and can maintain a yield rate of 99% even after being mass-produced for more than a year through packaging and assembly Only chips with 5% or more can be called KGD.
39. Lead Frame tripod
Various electronic components with sealed bodies and multiple pins, such as integrated circuits (ICs), mesh resistors, or simple diode triodes, have a metal frame temporarily fixed to the body and pins before packaging, called a lead frame. This word is also known as a fixed frame or tripod. The packaging process involves fixing the central chip (Die, or Chip chip) with a gold or silver layer on its back to the gold plating layer at the center of the tripod using high-temperature welding, known as Die Bond. Another gold or aluminum wire is used to connect the already secure chip with each pin, which is called a lead bond. Then seal the entire body with plastic or ceramic, cut off the frame of the tripod, and further bend the legs to form the desired components. It is known that "tripod" plays a very important role in the electronic packaging industry. The commonly used alloy materials include Kovar, Alloy 42, and phosphor bronze, and their forming methods include mold punching and chemical etching.
40. Lead Pitch Foot Distance
The distance between the centerlines of various pins of a component. In the early days, the standard pin spacing for socket installation was 100mil. Nowadays, the QFP pin spacing for densely assembled SMT has been repeatedly tightened from the initial 50mil to 25mil, 20mil, 16mil, and 12 5ml to 9.8mil, etc. It is generally believed that a foot pitch below 25mil (0.653mm) is called a fine pitch.
41. Multi Chip Module (MCM)
This is another type of microelectronic product that only began to develop in the 1990s, similar to current small circuit boards such as IC cards or Smart cards. However, what sets MCM apart is that it assembles various ICs that have not yet been fully packaged onto a circuit board using traditional "Die Bond" or modern Flip Chip or TAB methods in the form of "Bare Chips". Just like early electronic probes that directly mounted a chip on a board, wiring and sealing were also required, known as COB (Chip On Bond) method. But today's MCM is much more complex, not only with multiple chips installed on multi-layer boards, but also directly combined with "bumps" instead of "wires". It is a high-level microelectronic assembly. The definition of MCM is the direct assembly of bare chips on a small board surface without the need for wiring, with chips occupying over 70% of the total board area. There are three typical types of MCMs, namely (currently D type seems to have the most potential): MCM-L: which still uses various materials of PCB substrates (laminates), and its manufacturing equipment and methods are exactly the same as PCB, except that it is relatively thin, light, and short. At present, IC cards with line widths ranging from 5ml to 10 mil aperture can be produced in China, which will enable the production of such MCMs. However, due to the need for chip and wire bonding or reverse soldering, the purity of the gold plated "bump" must reach 99.99%, and the area must be as small as 1 micrometer square, which is relatively difficult. MCM-C: The substrate has been replaced with a hybrid ceramic board (Ceramic), which is a type of ceramic multilayer board (MLC). Its circuits are similar to Hybrid, and are made of thick film printed gold paste, palladium paste, silver paste, etc. The chip assembly also uses reverse flip chip method. MCM-D: Its multi-layer structure of circuit and dielectric layers is achieved by using deposited thin film method or Green Tape circuit transfer method, where conductors and dielectrics are sequentially stacked on ceramic or polymer substrates to form a combination of multilayer boards. This MCM-D is the most precise among the three.
42. OLB (Outer Lead Bond) external pin combination
It is a process station in the "Tape Automatic Bonding" (TAB) technology, which refers to the outward facing pins on all four sides of the TAB assembly, which can be soldered to the corresponding pads on the circuit board, known as "external pin bonding". This TAB assembly also has four inward facing pins, which are used to connect integrated circuit chips (chips or chips) inward, called inner pin bonding (ILB). In fact, the inner and outer pins are already integrated. Known as TAB technology, simply put, it treats the densely packed internal and external pins on all four sides as a "bridge", and uses OLB to directly combine complex IC chip semi-finished products on the circuit board, eliminating the trouble of traditional IC pre packaging.
43. Packaging packaging, construction
Simply put, this term refers to a series of processes that complete the "sealing" and "forming" of various electronic components. But if its meaning is expanded and extended, then until the completion and launch of large-scale computers, all manufacturing work can be called "Interconnected Packaging Interconnection Architecture". If the electronic kingdom is divided into many levels of hierarchical systems, the various levels of electronic assembly or construction, from small to large in scale, will be: Chip (chip, chip manufacturing), Chip Carrier (individual finished product packaging of integrated circuits), Card (assembly of small circuit boards), and Board (assembly of regular circuit boards), totaling five levels.
44. Passive Device (Component)
It refers to some components such as resistors, capacitors, or inductors. When an electronic signal is applied to it, a passive component that remains unchanged in its basic characteristics is called a "passive component"; On the other hand, there are active devices such as transistors, diodes, or electron tubes.
45. Photomask Mask
This is a term used in the microelectronics industry, referring to the glass film used for photosensitive imaging of semiconductor wafers. The light shielding agent in the dark area may be latex of general film or extremely thin metal film (such as chromium). This type of photomask can be used for imaging on the surface of "silicon wafers" coated with photoresist. Its method is very similar to PCB, except that the line width is reduced to the micrometer (1-2 μ m) level, and even to the sub micrometer level (0.5 μ m) accuracy, which is 100 times smaller than the thinnest line on the circuit board. (1 mil=25.4 μ m).
46. Pin Grid Array (PGA) matrix pin packaging
It refers to a complex packaging body with needle shaped upright pins arranged in a matrix pattern on the reverse side, which can be inserted into the through holes of the circuit board. On the front side, there is a multi-layer chip package interconnect area with a central depression, which can accommodate more I/O pins than a "dual row pin package" (DIP). The attached diagram is its schematic and physical image.
47. Popcorn Effect
Originally, it referred to an IC packaged in a plastic outer body. Due to the silver paste used for chip installation absorbing water, if the plastic body is not properly sealed and subjected to high temperatures during downstream assembly and welding, its moisture will cause the seal to burst due to vaporization pressure, and it will also make a popcorn like sound, hence the name. Recently, P-BGA packaging components have become very popular. Not only does the silver adhesive absorb water, but the BT substrate of the carrier board also absorbs water. Poor management often leads to popcorn phenomenon.
48. Potting casting seal, mold seal
It refers to placing various electronic assemblies that are prone to deformation, damage, or must be isolated into specific molds or cavities, pouring and filling them with liquid resin, and then sealing the circuit assembly inside after hardening. The gaps in the circuit assembly can be filled to provide isolation protection, such as packaging TAB circuits, integrated circuits, or other circuit components, which can use Potting method. Potting is similar to Encapsulating, but the former emphasizes the absence of voids within the sealed interior.
49. Power Supply
A device that can supply electrical power to another unit, such as a transformer, rectifier, filter, etc. It can convert alternating current into direct current or maintain a constant input voltage within a certain limit.
50. Preform prefabricated products
It often refers to various packaging materials or welding metals. For the convenience of construction, the raw materials are first made into a shape that is easy to manipulate and control, such as making hot melt adhesive into small pieces or blocks for easy weighing and melting and blending. The glass used for sealing ceramic ICs can be made into small bead shapes, or the solder can be made into small ball shapes to facilitate the preparation of solder paste, all of which are called Preforms.
51. Purple Plague
When gold and aluminum are in close contact with each other for a long time and exposed to moisture and high temperatures (above 350 ℃), a purple copolymer is formed between their interfaces, which is called Purple Plague. This "purple epidemic" is brittle and can cause the "bond" between gold and aluminum to collapse. When there is silicon nearby, this phenomenon is more likely to generate "Ternary" copolymers and accelerate deterioration. Therefore, when the gold layer must be in close contact with the aluminum layer, an additional "barrier layer" should be added between them to prevent the formation of eutectic compounds. Therefore, in the "bumping" process upstream of TAB, one or two layers of titanium, tungsten, chromium, nickel, etc. must be evaporated on each aluminum pad on the surface of the chip as a barrier layer to ensure the adhesion of its bumps. (See PCB Information Magazine, Issue 66, P.55 for details).
52. Quad Flat Pack (QFP) Square Flat Package
It refers to a general term for a large-scale integrated circuit (VLSI) with a square body and four sided pins. This type of large IC used for surface mounting can be divided into J-shaped pins (also used for SOICs with double-sided extension pins, which are easier to maintain the coplanarity of each pin), Gulf Wing pins, flat extension pins, and castle type non pin pins. In everyday spoken or written expression, QFP is commonly referred to as QFP, and there is also a colloquial term called Quad Pack. The mainland industry refers to it as "large-scale accumulation blocks".
53. Radial Lead radial pins
The pins of the component are scattered from the side of the body, such as various DIPs or QFPs, which are different from the axial leads extending from the two ends of the component.
54. Relay relay
It is a special control component similar to an active contact. When the current passing through it exceeds a certain "fixed value", the contact will disconnect (or connect), causing the current to interrupt and continue, deliberately affecting the operation of components in the same or other circuits. According to its manufacturing principles and structure, relays made in various ways such as electromagnetic coils, semiconductors, pressure type relays, bimetallic sensitive relays, photosensitive relays, and reed switches are important components in electrical engineering.
55. Semi Conductor Semiconductor
Refers to solid substances (such as Silicon), whose resistivity is between that of a conductor and a resistor, and is called a semiconductor.
56. Separable Component Part
Refers to the parts or accessories on the main body that do not have chemical bonding with the main body and have not been reinforced with protective film, welding or sealing materials (Potting Compound); Making it detachable at any time is called a "separable component".
57. Silicon
It is a black crystalline non-metallic element with an atomic number of 14 and an atomic weight of 28, accounting for about 25% of the total weight of surface materials. Its oxide, silicon dioxide, is mainly composed of sandy soil. The commercial process of pure silicon involves multiple complex reduction reactions of SiO2 to obtain 99.97% pure silicon crystals, which can be sliced and used for the manufacturing of semiconductor "wafers". It is the most important material in modern electronics industry.
58. Single In line Package (SIP) single-sided pin package
SIP is a type of component package that only has straight pin shaped pins or metal wire type pins, known as SIP
59. Solder Bump solder bump
Chips can be directly soldered onto the circuit board surface to complete the assembly and interconnection of chips and circuit boards. This reverse button COB flip chip method can save a lot of chip packaging processes and costs. But for the various contacts between the chip and the board surface, in addition to preparing corresponding soldering bases for the PCB, various circular or square micro "solder bumps" must also be made on the periphery of the chip itself. When the bumps are only placed around the periphery of the "chip", it is called FCOB. If there are bumps distributed all over the surface of the chip, the flip chip reverse welding method is called "Controlled Collapsed Chip Connection" or C4 method.
60. Solder Colum Package
It is a process developed by IBM. The C-BGA ceramic package is assembled by soldering its high pillar solder pins onto a circuit board. The tin lead ratio of this type of solder column base is 90/10, with a height of about 150mil, and can be welded by adding solder paste to the column base. This tin pillar is located between the PCB and C-BGA, and has the effect of stress dispersion and heat dissipation, which is very beneficial for large ceramic parts (with edge lengths ranging from 35mm to 64mm).
61. Spinning Coating Spin Coating
The coating of photoresist on the surface of semiconductor wafers is often done using the spin coating method. The coating method involves placing a wafer on a rotating disc, carefully pouring photosensitive emulsion onto the center of a circular surface, and then balancing centrifugal force and adhesion to leave a uniform photoresist film on the circular surface. This method can also be used for coating construction in other occasions.
62. Tape Automated Bonding (TAB)
It is a type of chip for multi pin large-scale integrated circuits (ICs) that no longer undergoes traditional packaging to form a complete individual, but instead uses TAB carriers to directly attach unencapsulated chips to the board surface. The flexible tape of polyimide and the inner and outer pins formed by copper foil etching are used as carriers to first bond large chips onto the inner pins. After automatic testing, the circuit board is assembled by combining the "external pins" to complete the assembly. This new assembly method that combines packaging and assembly is called TAB method. This TAB method not only saves the cost of IC pre packaging, but also provides a new hope for multi pin assembly of large components for multi pin VLSI with over 300 pins, especially in the face of difficulties in SMT assembly (see special article in the 66th issue of the Circuit Board Information Magazine).
63. Thermocompression Bonding
It is a packaging method for ICs, which involves bonding thin gold or aluminum wires to the corresponding inner pins of the lead frame and each pole of the chip (chip) through heating and pressure, to complete the functional bonding. This is called "hot pressing bonding", abbreviated as T C.Bond。
64. Thermosonic Bonding - Thermal Ultrasonic Bonding
A method of "wire bonding" between chips and pins in an integrated circuit. The combination of heating and ultrasonic energy is called Thermonic Bonding, abbreviated as TS Bond.
65. Thin Small Outline Package (TSOP) Thin Small Integrated Circuit Device
The "IC" (SOIC) of small two sided extended gull wing feet has approximately 20-48 legs, with a width of 6-12mm including the legs and a foot spacing of 0.5mil. If used for PCMCIA or other handheld electronic products, the thickness needs to be further reduced by half, which is called TSOP. This thin and small dual row IC can be divided into two types; Type I extends the feet outward from the two short sides, while Type II extends the feet outward from the two long sides.
66. Three Layer Carrier
This refers to the substrate structure of the "TAB" type "chip carrier", which is composed of three layers: a thin resin layer (usually a polyimide film), copper foil, and an adhesive layer located in between. Therefore, it is called a Three Layer Carrier. There is a relatively "two-layer carrier", which refers to TAB products with the middle adhesive layer removed.
67. Transfer Bump, Transfer Bump
The automatic bonding type chip carrier with tape must first make the required solder or gold protrusions at each fixed point of the chip to form the bonding and conductive points between the inner pins and the chip. One of the methods is to prepare protrusions on other carriers first, and then transfer the protrusions to each inner pin before chip bonding, in order to continue bonding with the chip. This type of pre made protrusion is called a 'transfer type protrusion'.
68. Transistor transistor
It is a semiconductor based active component with three or more electrodes that can perform rectification and amplification functions. The raw materials for chips mainly use germanium and silicon elements, and deliberately add a small amount of impurities to form different simple semiconductors such as negative type (n Type) and positive type (p Type), which are called "transistors". This type of transistor has methods such as pin insertion or SMT bonding.
69. Ultrasonic Bonding Ultrasonic Bonding
It utilizes the energy of ultrasonic frequency oscillation (about 10 KHz) and the dual action of mechanical pressure to complete the wire bonding operation of gold or aluminum wires on IC semiconductor chips.
70. Two Layer Carrier Two Layer Carrier
This is also a new material for "tape type chip carriers", which is different from the three-layer carriers commonly used in the industry. The biggest difference is that the adhesive layer in the middle has been removed, leaving only two layers of "Polyimide" resin layer and copper foil layer directly adhered together. Not only does it become thinner and more flexible in thickness, but other properties have also been improved, but it has not yet reached the level of mass production.
71. Very Large Scale Integration (VLSI) circuits
Any semiconductor (Transistor) that can accommodate more than 80000 on a single die, and the width of the interconnect circuit between them is less than 1.5 μ (60 μ in), and this extremely large capacity die is packaged into a square IC with multiple pins on all four sides, is called VLSI. According to their different pin connections, this type of VLSI has various packaging methods such as J-shaped pins, gull wing pins, flat long pins, castle shaped pads, etc. At present, ICs with larger capacity and more pins (such as over 250 pins) are becoming increasingly difficult to install on SMT circuits. Therefore, bare chips are first mounted on the inner pins of TAB carriers and then transferred to PCBs; And directly attaching the grains back and forth, or directly soldering them onto the board surface, but they have not yet become popular in mass production in the general electronic industry.
72. Wafer wafer
It is the substrate of semiconductor component "grains" or "chips", and the circular thin slices cut from the stretched high-purity silicon element crystal pillars (Crystal Ingot) are called "wafers". Afterwards, a precision "photomask" is used to obtain the required "photoresist" through a photosensitive process, and then the silicon material is precisely etched into grooves, followed by a vacuum evaporation process of metal, to complete various micro components and micro circuits on their independent "die, chip". As for the backside of the wafer, a gold layer needs to be separately evaporated for the purpose of die attach on the tripod. The above process is called Wafer Fabrication. In the early days of small integrated circuits, thousands of grains were made on each 6-inch wafer. Nowadays, with sub micron line widths in large VLSI, only one or two hundred large chips can be completed on each 8-inch wafer. Although Wafer's manufacturing often involves investments of tens of billions, it is the foundation of all electronic industries.
73. Wedge Bond Wedge Joint
In semiconductor packaging engineering, various wire connections are made between chips and pins; Such as hot press bonding TC Bond, hot ultrasonic bonding TS Bond, and ultrasonic bonding UC Bond. After firmly bonding, the end of the gold wire must be flattened and pulled apart in order to continue threading in other areas. The second point of flattening and breaking is called Wedge Bond. As for the starting point of the wire head on the chip, another type of spherical bonding point that is compressed and pressed first is called a Ball Bond. The left four figures show the side view and top view of two types of junction points, as well as their corresponding real objects. Welding is also a type of bonding method for metals, which belongs to the "metallurgical" bonding method along with soldering or brazing. Although the strength of the fusion method is good, the construction temperature of the joint is also extremely high, which must exceed the melting point of the metal being joined, so it is less commonly used in the electronics industry.
74. Wire Bonding
The one-stop semiconductor IC packaging process involves various wire bonding techniques using gold or aluminum wires (with a diameter of 3 μ) on the electrodes of the IC die or chip, and then pulling the wires to the inner legs of the lead frame to complete the circuit. This type of wire bonding is called wire bonding.
75. Zig Zag In Line Package (ZIP) chain toothed double row foot package
The packaging of electronic components has a single row leg structure, and its single row legs are arranged in an asymmetric "staggered pattern", like the interlocking teeth of a zipper, hence it is called Zig Zag style. ZIP is a low pin insertion soldering method for packaging small parts, which can also be made into a surface mount form. However, this packaging method is only relatively popular in the Japanese industry.
76 ASIC Application Specific Integrated Circuit
Specific purpose integrated circuit (IC) is an IC designed and manufactured according to the specific needs and functions of customers. It is an IC that can be produced in small quantities, quickly change production models, and maintain low cost.
77 BGA Ball Grid Array
Matrix ball pad surface adhesive component (similar to PGA, but S MD)
78 BTAB Bumped Tape-Automated Bonding
The automatic bonding tape with protrusions refers to the TAB tape with protrusions transferred on each inner leg, which can be used for automatic bonding with naked sheets.
79 C-DIP Ceramic Dual -in-line Package
Ceramic Double Sacrificial Foot Encapsulation Body (mostly used for IC)
80 C4 Controlled Collapse Chpi connection
Bare chip with adjustable grip height, reverse buckle fusion welding
81 CMOS Complimentary Metal-Oxide Semiconductor
Complementary Metal Oxide Semiconductor (a technology that combines P and N channels on the same "metal oxide semiconductor")
82. COB Chip On Board
The chip is directly assembled on the circuit board. It is an early method of directly assembling naked chips on PCBs. It is assembled by bonding the back of the chip to a small gold-plated PCB using adhesive, followed by wire bonding and sealing, which can save the process and cost of IC packaging itself. Early electronic probes and LED electronic watches will adopt the COB method. However, this is different from the recent naked chip flip chip assembly method. The new flip chip method not only automates but also eliminates wire bonding, and its quality and reliability are better than early COBs.
83 CSP Chip Scale Package
Grain level packaging
84 DIP Dual Inline Package
Double row pin package (mostly referring to integrated circuit devices assembled with early sockets)
85 FET Field-Effect Tranistor
Field effect transistor utilizes the electric field formed by the input voltage to control the output current. It is a semiconductor component that can perform functions such as amplification, oscillation, and switching. Generally divided into two types: "junction gate type" field-effect transistors and "metal oxide semiconductor" field-effect transistors
86. GaAs Gallium Arsenide (Semiconductor)
Arsenide semiconductor is a semiconductor composed of arsenic (As) and (Ga), with a bandgap width of 1.4 electron volts. It can be used in transistor components and has a temperature limit of up to 400 ℃. Usually, the movement speed of electrons in arsenide semiconductors is six times faster than in silicon semiconductors. GaAs will be developed into high-frequency and high-speed "integrated circuits", which will have great prospects for the use of ultra high speed computers and microwave communication.
87 HIC Hybrid Integrated Circuit
Hybrid integrated circuits use thick film paste to print resistors, capacitors, and wiring on porcelain plates, while diodes and transistors are made of silicon wafers and combined on porcelain plates. The component composed of such a mixture is called HIC.
88 IC Integrated Circuit
Integrated circuit (IC) is a collection of miniature components that interconnect many active components (transistors, diodes) and passive components (resistors, capacitors, wiring) into an array, grown on a semiconductor substrate (such as silicon or arsenide), and can perform complete electronic circuit functions. Also known as Monolithic Circuits.
89 ILB Inner Lead Bonding
Internal pin bonding refers to the process of reverse bonding the internal pins of TAB with bumps (plated with tin, lead, or gold) on the chip, or the bumps on the internal pins with the chip.
90. KGD Known Good Die
Confirming good chips
91 LCC Leadless Chip Carrier
Footless chip carrier (a type of large IC)
92 LCCC Leadless Ceramic Chip Carrier
Ceramic footless chip carrier (a type of large IC)
93 LGA Land Grid Array
Solder pad grid arrangement refers to the pin solder pads arranged in a matrix, such as BGA "ball pin array package" or CGA "column pin array package".
94 LSI Large Scale Integration
Large scale integrated circuit (LSI) refers to a silicon semiconductor chip that contains thousands of independent micro components such as basic logic gates and transistors.
95 MCM Multichip Module
Multi chip module refers to the assembly of multiple bare chips on a small circuit board, which occupy more than 70% of the surface area and are called MCM. This type of MCM has three types: L, C, and D. L-shaped (laminates) refers to multi-layer boards made of resin laminates. C (Co fired) refers to a mixed circuit board made by co firing ceramic plates and thick film paste printing, while D (deposited) is a circuit board made on ceramic materials using vacuum evaporation technology of integrated circuits.
96. PGA Pin Grid Array
Matrix Pin Encapsulation Component
97 PLCC Plastic Leaded Chip Carrier
Plastic encapsulated chip carrier with feet (glue sealed large IC)
98 QFP Quad Flat Package
Four sided supervised flat pin package (referring to two types of ICs, ceramic and adhesive, for large chip carriers)
99 SIP Single Inline Package
Single row foot packaging body
100 SOIC Small Outline Intergrated Circuit
Small external pin integrated circuit refers to a small surface mount IC with dual row pins, available in two types: gull wing pins and J-pins.
101 SOJ Small Outline J-lead Package
Double row J-shaped foot packaging component
102 SOT Small-Outline Transistors
Small external pin transistor
103 TAB Tape Automatic Bonding
The tape automatic bonding technology is a technique in which bare chips are first connected to the inner legs of a tape stand (ILB) using gold or tin plated lead "bumps". After automatic testing, the outer legs of the tape stand are connected to the solder pads of a circuit board (OLB). This technology, which uses the tape stand as the intermediate carrier and directly assembles bare chips on the PCB, is called "TAB technology".
104 TCP Tape Carrier Package
Tape carrier packaging (this is a Japanese term, which is the same as the American term TAB "tape automatic bonding")
105 TFT Thin Film Transistor
Thin film transistors can be used for color display in large-area LCDs, which is very useful for future thin TVs.
106 TSOP Thin Small Outline Plackage
The ultra-thin external pin package is a tiny IC with thin and small double row pins surface mounted, with a thickness of only 1.27mm, which is only a quarter of the height of a standard SOJ.
107 ULSI Ultra Large Scale Integration
vlsi
108 VHSIC Very High Speed Integrated Chips
